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i965/fs: Define new shader opcode to set rounding modes

Description

i965/fs: Define new shader opcode to set rounding modes

Although it is possible to emit them directly as AND/OR on brw_fs_nir,
having a specific opcode makes it easier to remove duplicate settings
later.

v2: (Curro)

  • Set thread control to 'switch' when using the control register
  • Use a single SHADER_OPCODE_RND_MODE opcode taking an immediate with the rounding mode.
  • Avoid magic numbers setting rounding mode field at control register.

v3: (Curro)

  • Remove redundant and add missing whitespace lines.
  • Match printing instruction to IR opcode "rnd_mode"

v4: (Topi Pohjolainen)

  • Fix code style.

Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

Details

Provenance
Alejandro Piñeiro <apinheiro@igalia.com>Authored on Jul 1 2017, 8:12 AM
Jose Maria Casanova Crespo <jmcasanova@igalia.com>Committed on Dec 6 2017, 8:57 AM
pmoreauPushed on Dec 6 2017, 10:34 PM
Parents
rMESAac8d4734f695: i965: Add support for control register
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